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Cost-effective scan architecture and a test application scheme for scan testing with non-scan test power and test application cost
Cost-effective scan architecture and a test application scheme for scan testing with non-scan test power and test application cost
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机译:具有非扫描测试能力和测试应用成本的经济高效的扫描架构和测试应用方案,用于进行扫描测试
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摘要
A method and apparatus for scan design architecture with non-scan testing cost is disclosed. In one embodiment, the method comprises: transforming a plurality of sequential cells for a sequential circuit to a plurality of controllable and observable cells for a combinational circuit; connecting said plurality of sequential cells with at least one shifter registers; obtaining at least one scan chains; and substituting the ATPG step for said sequential circuit with the ATPG for said combinational circuit. In another embodiment, the apparatus comprises: means for transforming a plurality of sequential cells for a sequential circuit to a plurality of controllable and observable cells for a combinational circuit; means for connecting said plurality of sequential cells with at least one shifter registers; means for obtaining at least one scan chains; and means for substituting the ATPG step for said sequential circuit with the ATPG for said combinational circuit.
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