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Reconfigurable computing: its concept and a practical embodiment using newly developed dynamically reconfigurable logic (DRL) LSI

机译:可重构计算:其概念和使用新开发的动态可重构逻辑(DRL)LSI的实际实施方案

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This paper first outlines a broad range of reconfigurable computing research activities from a perspective of system LSI designs. Then, the paper focuses onto dynamically reconfigurable logic (DRL) LSI, a prototype chip that we developed to evaluate the reconfigurable computing concept. Through its ability to exchange hardware contexts quickly, this chip can accelerate media/communication applications with customized hardware configurations, yet maintaining scalability towards varying application sizes.
机译:本文首先从系统LSI设计的角度概述了广泛的可重构计算研究活动。然后,本文重点介绍动态可重构逻辑(DRL)LSI,这是我们开发的用于评估可重构计算概念的原型芯片。凭借其快速交换硬件环境的能力,该芯片可以通过定制的硬件配置来加速媒体/通信应用,同时保持针对各种应用规模的可扩展性。

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