A 16ps-resolution Random Equivalent Sampling circuit for TDR utilizing a Vernier time delay generation

摘要

A Random Equivalent Sampling (RES) circuit that has 16ps sampling resolution has been developed for a high-resolution Time-Domain Reflectometer (TDR). The high-resolution TDR uses an expensive programmable delay chip or a complex Time-to-Digital Converter (TDC) circuit to capture the waveform with very fine time interval. The Vernier time delay generation technique using two crystal oscillators of slightly different frequency is proposed, which is simpler and more cost-effective and provides subpicosecond time resolution. One of the two clocks is used for the reference time to generate incident periodic pulses, and another clock is used for the sampling, The implemented RES circuit consists of the Vernier clock generator, the pulse generator and the control logic for pulse generation, interface and high-speed memory control. Using the ADC of relatively low sampling rate, the periodic pulse waveform is reconstructed with tens of GSPS high equivalent sampling rate by the repetitive sampling utilizing the incremental Vernier time delay. The performance of RES circuit is measured through the operation of TDR. The resolution of the RES circuit is 16.8ps equal to 59.5GSPS sampling rate, which means that the signal waveform in the 66.7%VOP RG58C/U cable can be sampled by 1.6mm interval.