A 1 V CMOS analog comparator using auto-zero and complementary differential-input technique

摘要

A CMOS comparator operating over a 1 V to 5 V supply range is presented. No special low-voltage technology is used for fabrication. An experimental chip was fabricated using a 0.5 /spl mu/m 5 V CMOS double-poly double-metal technology. The chip area of the comparator was 230/spl times/160 /spl mu/m/sup 2/. Measured results at 1 V supply voltage show a comparator response time of less than 4 /spl mu/s for 10 mV precision. Static power consumptions at 1 V supply voltage including input/output pads for comparator is 1 /spl mu/W.