This paper presents a novel voltage mode Balanced Ternary Adder (BTA), implemented with Recharged Semi- Floating Gate Devices. By using balanced ternary notation, it possible to take advantage of carry free addition, which is exploited in designing a fast adder cell. The circuit operates at 1 GHz clock frequency. The supply voltage is only 1.0 Volt. The circuit is simulated by using Cadence R Analog Design Environment, with CMOS090 process parameters, a 90nm General Purpose Bulk CMOS Process from STMicroelectronics with 7 metal layers. All the capacitors are metal plate capacitors, based on vertical coupling capacitance between stacked metal plates.
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机译：本文介绍了一种新型的电压模式平衡三进制加法器（BTA），该电路通过再充电半浮栅器件实现。通过使用平衡的三进制表示法，可以利用无载加法，这在设计快速加法器单元时得到了利用。该电路以1 GHz时钟频率工作。电源电压仅为1.0伏。该电路使用Cadence R Analog Design Environment进行仿真，具有CMOS090工艺参数，这是意法半导体（STMicroelectronics）具有7个金属层的90nm通用批量CMOS工艺。所有电容器都是金属板电容器，基于堆叠的金属板之间的垂直耦合电容。
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