Robust low-cost analog signal acquisition with self-test capabilities

摘要

An architecture based on a parallel statistical sampler with digital post-processing is proposed to provide graceful performance degradation of data acquisition under a multiple failure scenario. After a self-configuration stage, an adaptive procedure keeps track of parametric variations on the signal path during operation and corrects the digital modeling block. Parametric faults are thus detected and their impact on the system behavior is minimized. The low-cost of the basic analog building block allows the inherent redundancy and the parallel reconstruction model of the architecture to bear faults with decreased dynamic performance. Analysis of the architecture and the digital modeling employed is presented, as well as measurement data to validate the feasibility of the approach.