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Design Techniques for Robust Analog Signal Acquisition.

机译:稳健的模拟信号采集的设计技术。

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摘要

The random demodulator architecture is a compressive sensing based receiver that allows the reconstruction of frequency-sparse signals from measurements acquired at a rate below the signal's Nyquist rate. This in turn results in tremendous power savings in receivers because of the direct correlation between the power consumption of analog-to-digital converters (ADCs) in communication receivers and the sampling rate at which these ADCs operate. In this thesis, we propose design techniques for a robust and efficient random demodulator. We tackle two critical components that are most critical, the resetting mechanism of the integrator and the random sequence. On the one hand, the resetting mechanism can pose challenges in practical settings that can degrade the performance of the random demodulator. We propose practical approaches to mitigate the effect of resetting and propose resetting schemes that provide robust performance. On the other hand, the random sequence is a central part in the system and the properties of this sequence directly affect the properties of the whole system. We study the performance of the random demodulator under many practical random sequences such as maximal length sequences and Kasami sequences and provide pros and cons of using each in the random demodulator.
机译:随机解调器体系结构是基于压缩感测的接收器,它允许从以低于信号的奈奎斯特速率的速率获取的测量结果重建频率稀疏的信号。由于通信接收器中的模数转换器(ADC)的功耗与这些ADC工作的采样率之间的直接相关性,这反过来又导致了接收器中的巨大功耗节省。本文提出了一种鲁棒高效的随机解调器的设计技术。我们处理两个最关键的关键部分,即积分器的重置机制和随机序列。一方面,复位机制可能会在实际设置中带来挑战,从而降低随机解调器的性能。我们提出了减轻复位影响的实用方法,并提出了提供可靠性能的复位方案。另一方面,随机序列是系统的中心部分,该序列的属性直接影响整个系统的属性。我们研究了随机解调器在许多实际随机序列(例如最大长度序列和Kasami序列)下的性能,并提供了在随机解调器中使用每种方法的优缺点。

著录项

  • 作者

    Singal, Vikas.;

  • 作者单位

    Rice University.;

  • 授予单位 Rice University.;
  • 学科 Computer engineering.;Electrical engineering.
  • 学位 M.S.
  • 年度 2012
  • 页码 74 p.
  • 总页数 74
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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