PID controller modifications to improve steady-state performance of digital controllers for buck and boost converters

摘要

The sensitivity of the analog-to-digital converter and inherent time delay in a digital controller can degrade the steady-state performance of a DC-DC power converter. Analog PID controllers were designed for prototype buck and boost converters and then implemented on a TI DSP. Three modifications to the digital PID controllers were investigated to improve their steady-state performance. The modifications were a dead zone, an averaging digital filter and two sets of gains. The digital controller monitors the output voltage error to determine if a modification should be employed to calculate the next duty cycle. Experimental results from both prototype converters indicates that a stable and accurate steady-state response can be obtained while maintaining a good transient response.