We present the implementation of an integer wavelet transform on a parallel TI TMS320C40-platform. The design space exploration is not driven by arithmetic optimizations, but rather by data transfer and storage estimates. The main focus of this paper lies on the detailed memory organization exploration. A number of implementation approaches is discussed. Based on the memory constraints imposed by the selected platform, the classical row-column approach was selected. By efficiently exploiting the DMA-facilities of the TMS320C40, we have realized a near real-time implementation.
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