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Establishing latch correspondence for sequential circuits using distinguishing signatures

机译:使用区分特征为时序电路建立闩锁对应

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This paper addresses the problem of establishing the unknown correspondence for the latch variables of two sequential circuits which have the same state encoding. This has direct application in finite state machine verification: If a one-to-one correspondence can be established between the latches of two circuits, then checking for their equivalence reduces to a much simpler combinational equivalence check problem. The approach presented in this paper is based on methods used to solve the unknown correspondence problem for inputs and outputs in combinational circuits. It computes input and novel latch output signatures, using ROBDDs, for each latch variable of a circuit that help to establish correspondence. Experimental results on a large set of benchmarks show the efficacy of this approach.
机译:本文解决了与具有相同状态编码的两个连续电路的锁存变量建立未知对应的问题。这在有限状态机验证中具有直接应用:如果可以在两个电路的锁存器之间建立一对一的对应关系,则检查其等当量会降低到更简单的组合等价检查问题。本文呈现的方法是基于用于解决组合电路中的输入和输出的未知对应问题的方法。它计算使用ROBDDS的输入和新颖的锁存输出签名,用于帮助建立通信的电路的每个锁存变量。一大集基准的实验结果表明了这种方法的功效。

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