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Establishing latch correspondence for sequential circuits using distinguishing signatures

机译:使用区分特征为时序电路建立闩锁对应关系

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This paper addresses the problem of establishing the unknown correspondence for the latch variables of two sequential circuits which have the same state enconding. This has direct application in finite state machien verification. If a one-to-one correspodence can be established between the latches of two circuits, then checking for their equivalence reduces to a much simpler combinational equivalence check problem. The approach presented in this paper is based on methods used to solve the unknown correspondence problem for inputs and outputs in combinational circuits. It computes input and novel latch output signatures, using ROBDDs, for each latch variable of a circuit that help to establish correspondence. Experimental results on a large set of benchmarks show the efficacy of this approach.
机译:本文讨论了为状态相同的两个时序电路的锁存变量建立未知对应关系的问题。这可以直接应用于有限状态机验证。如果可以在两个电路的锁存器之间建立一对一的对应关系,则检查它们的等效性将简化为一个更简单的组合等效性检查问题。本文提出的方法基于用于解决组合电路中输入和输出的未知对应问题的方法。它使用ROBDD为有助于建立对应关系的电路的每个锁存变量计算输入和新颖的锁存输出签名。在大量基准上的实验结果表明了该方法的有效性。

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