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A high speed VLSI architecture for scaled residue to binary conversion

机译:高速VLSI架构,可将残渣按比例转换为二进制

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The scaled Chinese Remainder Theorem (CRT) is a very useful tool for the simplification of RNS to binary converters. The main drawback of this methodology is related to the use of large look-up tables that store the correspondence among the modular numbers and the corresponding scaled terms of the CRT. This fact limits the maximum speed allowed by this approach. In this paper a new method for the computation of the scaled factors is presented. It allows the computation of the scaled CRT output by using very small look-up tables implemented by conventional logic and simple and fast structures, that work in parallel. The only assumption made in order to develop the new algorithm is that the moduli must be odd.
机译:比例缩放的中国余数定理(CRT)是将RNS简化为二进制转换器的非常有用的工具。该方法的主要缺点与使用大型查找表有关,该查找表存储了模块号和CRT的相应换算项之间的对应关系。这个事实限制了这种方法所允许的最大速度。本文提出了一种新的比例因子计算方法。它允许通过使用由常规逻辑以及并行工作的简单快速结构实现的非常小的查找表来计算缩放后的CRT输出。为了开发新算法而做出的唯一假设是模数必须是奇数。

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