Specification languages with a sound and well established semantics are applied to the definition of hardware devices. Exploiting these formalisms, theorem provers are introduced in the design flow to guarantee the equivalence of the different abstraction levels involved in the process of behavioural synthesis. Design constraints, such as area and timing, are evaluated linking this design phase to the logic synthesis level. The benefits of applying this design methodology are highlighted through the analysis of the design of an application specific integrated circuit (ASIC) of medium complexity in the telecom domain.
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