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VLSI design of a bus arbitration module for the 68000 series of microprocessors

机译:用于68000系列微处理器的总线仲裁模块的VLSI设计

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Modern computer systems often are designed around a bus architecture. This, of course eliminates the need for complete point-to-point interconnection of all the devices attached to the bus. The major hurdle to this system is in resolving the conflicts that arise when more than one device wants to use the bus to communicate at a time. The job of resolving such conflicts is left to bus arbitration circuitry. A system designer using the MC68000 family is in some luck. This series of microprocessors has a limited set of lines built in to allow for external circuitry to request and receive the bus from the processor. However, having given up the bus the processor does nothing to decide who receives the bus next. This is left to external arbitration circuitry. This paper describes a VLSI chip designed to perform bus arbitration for the Motorola MC68000 series of microprocessors. With such a module, several devices (such as DMA, I/O controllers, and multiple microprocessors) can share a single bus while our device handles all bus conflicts using a priority scheme. The device is flexible, programmable, and compatible with the MC68000 family's bus architecture and their support chips.
机译:现代计算机系统通常围绕总线体系结构进行设计。当然,这消除了连接到总线的所有设备的完整点对点互连的需要。该系统的主要障碍在于解决当多个设备想要一次使用总线进行通信时出现的冲突。解决此类冲突的工作留给总线仲裁电路解决。使用MC68000系列的系统设计师很幸运。该系列微处理器具有有限的内置线路集,以允许外部电路从处理器请求和接收总线。但是,放弃总线后,处理器无法决定谁下一步接收总线。这留给外部仲裁电路。本文介绍了一种VLSI芯片,该芯片设计用于执行Motorola MC68000系列微处理器的总线仲裁。使用这种模块,几个设备(例如DMA,I / O控制器和多个微处理器)可以共享一条总线,而我们的设备使用优先级方案来处理所有总线冲突。该设备是灵活的,可编程的,并且与MC68000系列的总线架构及其支持芯片兼容。

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