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Influence of CdCl/sub 2/ treatment of CdS on the properties of electrodeposited CdS/CdTe thin film solar cells

机译:CdCl / sub 2 / CdS处理对电沉积CdS / CdTe薄膜太阳能电池性能的影响

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The effects of cadmium chloride treatment on the thin (0.2 /spl mu/m) CdS layer in electrodeposited CdS/CdTe cells have been studied by comparing cell characteristics of sixteen cells with that treatment with those of sixteen cells without that treatment immediately after fabrication and after 180 days. Cells with the treated CdS layers (type A) had higher and more stable U/sub oc/ values e.g. 753/spl plusmn/5 mV (t=0), 742/spl plusmn/7 mV (t=180) compared with the untreated cells (type B) of 712/spl plusmn/18 mV (t=0), 660/spl plusmn/15 mV (t=180). CdCl/sub 2/ improved the CdS crystallinity as observed from electron microscopy and inferred from optical measurements. Current-voltage-temperature measurements showed that the current transport for both sets of cells was controlled by both tunnelling and interface recombination but type A cells displayed less tunnelling. The reverse saturation current, J/sub 0/, for type A cells was 2.0/spl plusmn/0.1 nA cm/sup -2/ (t=0 and 180) compared with type B cells for which J/sub 0/ was 16 nA cm/sup -2/ (t=0) and 25 nA cm/sup -2/ (t=180). The type A cells displayed little variation of capacitance at 10 kHz with reverse bias indicating the presence of an intrinsic or low doped depletion layer present at the CdS/CdTe interface. Surface analytic studies suggested the presence of a CdS/sub x/Te/sub 1-x/ compound.
机译:通过比较制造后立即使用的十六种细胞的细胞特性与未经处理的十六种细胞的细胞特性,研究了氯化镉处理对电沉积的CdS / CdTe细胞中的薄(0.2 / spl mu / m)CdS层的影响。 180天后。具有处理过的CdS层(A型)的电池具有更高和更稳定的U / sub oc /值,例如753 / spl plusmn / 5 mV(t = 0),742 / spl plusmn / 7 mV(t = 180)与未处理的细胞(B型)712 / spl plusmn / 18 mV(t = 0),660 / spl plusmn / 15 mV(t = 180)。 CdCl / sub 2 /改善了CdS的结晶度,这是从电子显微镜观察到的,并且可以从光学测量得出。电流-电压-温度测量结果表明,两组电池的电流传输均受隧穿和界面重组的控制,但A型电池的隧穿较少。与J / sub 0 /为16的B型电池相比,A型电池的反向饱和电流J / sub 0 /为2.0 / spl plusmn / 0.1 nA cm / sup -2 /(t = 0和180)。 nA cm / sup -2 /(t = 0)和25 nA cm / sup -2 /(t = 180)。 A型电池在10 kHz时显示的电容变化很小,带有反向偏置,表明在CdS / CdTe界面处存在本征或低掺杂耗尽层。表面分析研究表明存在CdS / sub x / Te / sub 1-x /化合物。

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