The use of fixed-point digital signal processors required a scaling of data at each arithmetic step to prevent overflows while keeping the accuracy. A development method which can automate this process is proposed. The programming uses a model of a hypothetical floating-point digital signal processor and a floating-point format for data representation. However, the program and data are automatically translated to fixed-point counterparts in order not to sacrifice the execution speed. To derive this method, an internal data representation method which consists of the mantissa, the exponent, and the range is employed. A pre-scaling-type fixed-point ALU architecture is used for the development of the proposed method.
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