A comparison of decimation filter architectures for sigma-delta A/D converters

摘要

A comparison is made of four alternative decimation filter structures suitable for sigma-delta A/D converters. Tradeoffs are examined between computational complexity coefficient storage, passband ripple, and sharpness of the transition band. Such tradeoffs become important in ASIC designs where the specifications of the A/D converter can vary significantly with the application. Improvements to the simulated annealing algorithm originally proposed by N. Benvenuto et al. (1989) for filter design, was used to determine the filter coefficients for all the proposed structures with considerable improvement in convergence time, are described.