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Analysis of the saturation properties of polysilicon emitter transistor for the BiCMOS VLSI design

机译:用于BiCMOS VLSI设计的多晶硅发射极晶体管的饱和特性分析

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The saturation behavior of the polysilicon emitter transistor has been studied through the analysis of a single most fundamental parameter, the saturation time constant, and correlated with the physical structure. It is shown that the current transport in the polysilicon emitter transistor is significantly affected by the polysilicon-monosilicon interface of the emitter and n-n/sup +/ interface of the collector region in comparison to the conventional transistor structure. The effect of the polysilicon-monosilicon interface becomes crucial for the transistor behavior at shallower emitter junction depths. The interface leads to a significant amount of charge storage in the emitter region and is apart from charge storage in the collector region bounded by n-n/sup +/ interface recombination velocity. It is noted that the increase in saturation time constant due to charge storage in the emitter and collector region should be taken into consideration in the design of BiCMOS VLSI circuits.
机译:通过分析单个最基本的参数,饱和时间常数并与物理结构相关,研究了多晶硅发射极晶体管的饱和行为。结果表明,与传统的晶体管结构相比,多晶硅发射极中的电流传输受到发射极的多晶硅单晶界面和集电极区域的n-n / sup +/-接口的显着影响。多晶硅-单晶硅界面的作用对于在较浅的发射极结深度处的晶体管行为至关重要。该界面导致在发射极区域中大量的电荷存储,并且与以n-n / sup + /界面复合速度为边界的在集电极区域中的电荷存储分开。注意,在BiCMOS VLSI电路的设计中,应考虑由于在发射极和集电极区域中存储电荷而导致的饱和时间常数的增加。

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