Practical manufacturing technique for reducing charge-induced gate oxide degradation during ion implantation

摘要

Abstract: Test wafers were fabricated to evaluate leakage and charge-to- breakdown (Q$-bd$/) of gate oxide capacitor structures subjected to high dose ion implantation. Both insulating and partially conductive (polysilicon) films were present on the wafer backsides during implantation, and the ion implanter's electron flood gun current was varied to optimize the final capacitor leakage yield. Relative to a conductive (polysilicon) backside film present during ion implantation, a backside 1700 Angstrom LPCVD Si$-3$/N$-4$/ layer provided significantly improved gate oxide protection, after optimization of the electron flood gun current. The backside LPCVD Si$-3$/N$-4$/ had no discernible effect on the Q$-bd$/ of the capacitors after high dose ion implantation. !12