Output-dependent delay cancellation technique for high-accuracy current-steering DACs

摘要

In this paper, an output-dependent delay cancellation (ODDC) technique is proposed. For a high-accuracy digital-to-analog converter (DAC), the delay differences caused by output voltage is one of the major nonlinearities that deteriorate the dynamic performance. The ODDC technique has the advantages of significant improvement on the dynamic performance in a wide frequency range without increasing the noise floor. ODDC can eliminate the switching time variations caused by output voltage of DAC through tuning the bulk voltage of switches in the deep N-well. The algorithm of ODDC technique is derived. To verify the implementation, a 14 bits 400MS/s current-steering DAC with ODDC is simulated and the SFDR can be improved by about 12dB with proper circuit parameters.