首页>
外国专利>
Delay techniques in active noise cancellation circuits or other circuits that perform filtering of decimated coefficients
Delay techniques in active noise cancellation circuits or other circuits that perform filtering of decimated coefficients
展开▼
机译:有源噪声消除电路或其他执行抽取系数滤波的电路中的延迟技术
展开▼
页面导航
摘要
著录项
相似文献
摘要
This disclosure describes circuit configurations that may be used for active noise cancellation in the digital domain. In particular, this disclosure proposes the use a down sample unit and an up sample unit, rather than memory-based delay circuits, to achieve one or more desired delays in digital adaptive noise cancellation circuits or other circuits that use delay for signal processing. The delay achieved by the down sample unit and the up sample unit may be tunable so as to allow flexibility in producing the necessary delay for different active noise cancellation circuit configurations. Many different adaptive noise cancellation circuit configurations are discussed, and the techniques may also be useful for other types of circuits, such as low-latency equalization circuits.
展开▼