Paradigm Shift in Interconnect Technology; Directed Assembly of Single-Walled Carbon Nanotube and Nanoparticle Interconnects

摘要

Carbon nanotubes (CNTs) because of their large aspect ratio, high current carrying capacity and superior thermal properties are being investigated as potential candidates for the replacement of metallic interconnects in future Complementary Metal Oxide Semiconductor (CMOS) electronics as well as future nanoelectronics that may not be silicon based. The realization of a truly 3D integrated circuit based on conventional CMOS technology is hindered by fabrication related challenges. One approach for using CNTs for interconnect application that has been explored is the vertical growth using chemical vapor deposition (CVD. This CVD based approach to grow nanotubes on CMOS electronics for interconnects is limited by high processing temperatures ( > 500℃) and nonselectivity to nanotube types (metallic or semiconducting). In this paper, we report on a new hybrid technique combining both bottom-up dielectrophoresis and top-down fabrication techniques to enable low temperature integration of SWNTs and gold nanoparticles into three-dimensional architectures. The goal is to make a universal platform for integration of nanoelements into 3D architectures at low temperature. The two terminal resistance of the assembled SWNTs at 10 Vpp assembly voltage is approximately 545 Ohms. The technique has been shown to be capable of large scale assembly of a single nanotube per location. Encapsulate of these devices resulted in a decrease of the total resistance. Nanoparticle nanowires with 10 run resolution have also been fabricated and characterized. This work provides an approach towards rapid assembly and organization of ultra-small nanoparticle networks without relying on chemical functionalization of particles or substrates.