Design Optimization of 500V 1A SOI 1 Chip Inverter ICs

摘要

The present paper reports development of 3rd generation 500V 1A SOI single chip inverter ICs. Important issues for the present ICs are chip cost reduction and long-term reliability of high voltage junctions, where 500V interconnection layers exist over the junctions. Reliable high voltage capability was realized by optimized multi-ring resistive field plates. The same low cost process, developed for 250V SOI power ICs, was adopted, and only 30V CMOS devices were utilized for logic, analog control and protection circuits without bipolar transistors. This greatly simplifed the fabrication processes, and increased the reliability of the circuits under high dV/dt driving conditions.