THE POSSIBILITY OF IMPLEMENTING A NONLINEAR SUCCESSIVE APPROXIMATION A/D CONVERTER USING FPGAs

摘要

This paper presents our study regarding the possibility to implement an analog to digital converter with the following capabilities: bipolar and linear analog to digital conversion with 8/12 bits resolution, bipolar non-linear (logarithmic) analog to digital converter with variable resolution 6/12 bits, bipolar and linear or non-linear analog to digital converter, depending on the measuring range. The main circuit of the converter is an FPGA (Field Programmable Gate Array). The converter has been testet using 500 kHz and 1MHz clock. The errors obtained with this converter were less than +-1 LSB.