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Synthesizing VHDL Programs from Tensor Product Formulas

机译:从Tensor产品公式合成VHDL程序

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In this paper, we present a system to translate tensor product formulas to VHSIC Hardware Description Language (VHDL) programs. Tensor product formulas are used to represent block recursive algorithms. Operations of tensor product formulas can be mapped to programming language constructs. We use VHDL as our target programming language for program synthesis. VHDL contains high-level programming language constructs as well as low-level constructs for describing hardware components. Hence, VHDL is suitable for VLSI circuit design. In our system, a tensor product formula is written in a LISP-like form and translated into VHDL code containing bit-level objects and operations. We use the parallel prefix problem as an example to illustrate program synthesis.
机译:在本文中,我们提出了一个将张量积公式转换为VHSIC硬件描述语言(VHDL)程序的系统。张量积公式用于表示块递归算法。张量积公式的运算可以映射到编程语言构造。我们使用VHDL作为目标程序语言进行程序综合。 VHDL包含高级编程语言构造以及用于描述硬件组件的低级构造。因此,VHDL适用于VLSI电路设计。在我们的系统中,张量积公式以类似于LISP的形式编写,并转换为包含位级对象和操作的VHDL代码。我们以并行前缀问题为例来说明程序综合。

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