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Experiments in Sub-micron cmos Technology: the jisi Project

机译:亚微米CMOS技术的实验:jisi项目

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This paper describes a set of micro-electronics experiments implemented in a 0.7 μm CMOS integrated circuit used for the training of graduate students. A set of 10 experiments are implemented on the chip and include basic devices such as MOS transistors, diodes, and silicon sensors, as well as design oriented experiments (complex gates, latches) and analog experiments (operational amplifiers, crosstalk sensors, Voltage Controlled Oscillators). The chip, named JISI is been fabricated in various CMOS technologies for performance evaluation with the technology scaling down.
机译:本文介绍了一组在0.7μmCMOS集成电路中实现的微电子实验,用于训练研究生。在芯片上实施了一组10个实验,其中包括诸如MOS晶体管,二极管和硅传感器之类的基本器件,以及面向设计的实验(复杂的门,锁存器)和模拟实验(运算放大器,串扰传感器,压控振荡器) )。这款名为JISI的芯片是用各种CMOS技术制造的,用于随着性能的降低而进行性能评估。

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