FPGA IMPLEMENTATION OF FORWARD ERROR CORRECTION FOR A SOFTWARE DEFINED RADIO

摘要

Software defined radios (SDR) are highly configurable hardware platforms that provide the technology for realizing the rapidly expanding third and future generation digital wireless communication infrastructure. While there are a number of silicon alternatives available for implementing the various functions in a SDR, field programmable gate arrays (FPGAs) are an attractive option for many of these tasks for reasons of performance, power consumption and flexibility. This paper examines the Forward Error Corrention (FEC) coding in SDRs using FPGA based a pre-existing base band processor.Fig The Simulations for the convolutional coding was completed in MATLAB. FPGA implementation process using Stratix EP1S40 is also described.