Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System

摘要

Static FPGA (Field Programmable Gate Arrays) designs are efficient for dataflow oriented applications while they are inefficient for control flow. We show that partial dynamic reconfigured designs can be more efficient than static designs, if the application contains exclusive coarse grain sections. Our case study is a multi-controller system, where various controller modules are exchanged during runtime depending on the operating regime of the controlled system. We present a multi-controller architecture as embedded system based on reconfigurable hardware. Portions of the FPGA design are exchanged during runtime to load new controller modules while other portions containing basic operational functions are static. We implemented a prototype to proof the concept and discuss the results.'