Development of an Instruction Set Simulator for Rapid Prototyping

摘要

An ISA (Instruction Set Architecture) simulator is an indispensable tool to design, develop and customize a processor, which either does not yet exist, or not available, and provides various functions such as checks of instruction behavior and/or estimation of performance and chip size. Due to increasing complexity of the architectures and time to market pressure, simulation performance becomes one of the most important features. This paper describes an implementation technique for instruction set compiled simulation. In our approach, in order to achieve the goal of rapid prototyping, modeling of an execution file for target processor is performed in the C language. Then simulator is created with a compiler on the host machine. An advantage of our approach is ability of a compiler on the host machine and that makes it easy to translate a target code to a host code.