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Parallel and Fault-Tolerant Routing in Nanoscale Spin-Wave Architectures

机译:纳米级自旋波架构中的并行和容错路由

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摘要

In this paper, we present a number of parallel and fault-tolerant routing schemes for a set of nanoscale spin-wave architectures. The architectures considered here have several features, including the ability to simultaneously transmit multiple data on the same spin-wave bus using different frequencies, as well as the capability to perform concurrent writes. These parallel features result in several parallel and fault-tolerant routing schemes that are investigated here. By alternating paths to transmit data, the spin-wave architectures can be reconfigured to avoid various faults present in the underlying switches, hence rendering a set of fault-tolerant architectures.
机译:在本文中,我们为一组纳米级自旋波架构提供了许多并行和容错路由方案。这里考虑的体系结构具有几个功能,包括使用不同的频率在同一自旋波总线上同时传输多个数据的能力,以及执行并发写入的能力。这些并行功能会导致在此研究几种并行且容错的路由方案。通过交替传输数据的路径,可以重新配置自旋波架构,以避免底层交换机中出现各种故障,从而提供了一组容错架构。

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