首页> 外文会议>International Conference on ASIC; 20031021-20031024; Beijng; CN >An Efficient Bit Loading Algorithm for OFDM-based Wireless LAN Systems and Hardware Implementation Results
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An Efficient Bit Loading Algorithm for OFDM-based Wireless LAN Systems and Hardware Implementation Results

机译:基于OFDM的无线局域网系统的高效位加载算法和硬件实现结果

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摘要

In this paper, we propose an efficient bit loading algorithm for IEEE 802.11a wireless LAN systems. A conventional bit loading algorithm uses the SNR value of each subcarrier. However, it is very difficult to estimate the exact SNR value in wireless LAN systems due to the randomness of AWGN. Therefore, the proposed algorithm uses the channel frequency response instead of the SNR value of each subcarrier. From 54Mbps simulation, we can obtain the performance gain of 6.5dB at PER of 10~(-2) with the proposed algorithm, whereas the conventional one obtains that of 5dB at the same conditions. Also, it is observed that the wireless LAN system with the proposed algorithm supports up to 63Mbps. After the logic synthesis using 0.3 5 μm CMOS technology, the logic gate count for the processor with the proposed algorithm can be reduced by 34% in comparison with the conventional one.
机译:在本文中,我们提出了一种用于IEEE 802.11a无线局域网系统的高效位加载算法。传统的位加载算法使用每个子载波的SNR值。但是,由于AWGN的随机性,很难估计无线LAN系统中的准确SNR值。因此,提出的算法使用信道频率响应代替每个子载波的SNR值。通过54Mbps的仿真,提出的算法在PER为10〜(-2)时可获得6.5dB的性能增益,而传统算法在相同条件下可获得5dB的性能增益。此外,可以观察到采用所提出算法的无线局域网系统支持高达63Mbps的速度。在使用0.3 5μmCMOS技术进行逻辑合成之后,与传统算法相比,采用该算法的处理器的逻辑门数可以减少34%。

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