μ-via technology enables hermetic protection and SMT for MEMS and Nano devices

摘要

Volume manufacturing of MEMS and Nano devices is challenged by the requirement for hermetic encapsulation and electrical connectivity. Packaging using ceramics suffers from particles and the large mismatch of TCE to MEMS devices. They cannot be used for wafer level packaging, WLP. On the other hand, conventional WLP technologies like silicon anodic bonding and glass frit sealing apply high temperatures for long times to the sensitive devices and do not provide surface mounting pads. Wire-bonding provides the electrical connection which results in larger than necessary and therefore more costly MEMS dies. In this paper we present a chip sized hermetic cap which seals and at the same time enables standard surface mount technologies, SMT, for circuit board assembly. The silicon based cap utilizes hermetical, vertical μ-vias for electrical connection. Extremely short coplanar lines provide excellent impedance matching from the board up to the component with low losses. This paper presents an enabling technology and products for packaging in automotive and handheld applications.