首页> 外文会议>International Conference on Industrial Control and Electronics Engineering;ICICEE 2012 >Simulation and Analysis of DS-SS Anti-jamming Performance Based on VHDL
【24h】

Simulation and Analysis of DS-SS Anti-jamming Performance Based on VHDL

机译:基于VHDL的DS-SS抗干扰性能仿真分析

获取原文

摘要

Arming at the difficulty of traditional simulation method to achieve analysis of DD-SS Anti-jam capability in engineering area and the implementation complexity using pure hardware, the paper introduces a simulation scheme based on VHDL. Two different spread spectrum gain systems are designed. The noise is recommended to the spread spectrum signal which characterizes manufacture under various interference. Search and acquisition by sequence phase method is adopted to complete the synchronization and to accomplish correlation despreading. Through increasing gradually noise in two spreading gain systems respectively, anti-jam performance of the system is analysised under different interference environment. Simulation result shows that increasing spreading gain can improve anti-jam capability. When spread spectrum gain is 127, the system can despread correctly by 26% bit error rate of received spread spectrum signal. If Spread spectrum gain increases 3 dB, the system despreads with zero error code even by 38% bit error rate of received signal. The simulation method and the conclusion have some reference value for the actual application.
机译:针对传统仿真方法难以在工程领域实现DD-SS抗干扰能力分析和纯硬件实现复杂性的问题,提出了一种基于VHDL的仿真方案。设计了两种不同的扩频增益系统。建议将噪声推荐给扩频信号,以表征各种干扰下的制造。采用序列相位搜索和获取来完成同步并完成相关解扩。通过分别逐渐增加两个扩频系统中的噪声,分析了系统在不同干扰环境下的抗干扰性能。仿真结果表明,增加扩频增益可以提高抗干扰能力。当扩展频谱增益为127时,系统可以正确地扩展接收的扩展频谱信号的26%误码率。如果扩频增益增加3 dB,则系统将以零错误码解扩,即使接收信号的误码率达到38%。仿真方法和结论对实际应用具有一定参考价值。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号