Performance evaluation of Hetero-Gate-Dielectric Re-S/D SOI MOSFET for low Power Applications

摘要

Recently, Fully-depleted Silicon-on-Insulator (FD SOI) technology has been recognized for its immunity over short-channel-effects (SCEs) in nanoscale regime. This paper presents the impact of Hetero-Gate-Dielectric on the performance of triple-metal-gate recessed-source/drain (TMG Re-S/D) FD SOI MOSFET for low-power and high-performance applications. Here, for the first time, the effect of gate-oxide engineering has been monitored in the design of TMG Re-S/D FD SOI MOSFET. For this, the short-channel immunity of the studied MOSFET has been investigated on the basic of various performance parameters like, off-state leakage (I