Manufacture and Characterization of a Novel Flip-Chip Package Z-interconnect Stack-up with RF Structures

摘要

More and more chip packages need multi-GHz RF structures to meet their performance targets. The ideal chip package needs to combine RF features with Digital features for these applications. They drive low-loss,controlledimpedance transmission lines,flexibility in assigned signal and power layers,and clearances of various shapes in power layers. Building these features in a chip package is difficult without making the stack-up very thick or compromising the reliability of the product. In the present paper,we have designed and built a flip-chip package test vehicle (TV) to make new RF structures,using Z-axis interconnection (Zinterconnect) building blocks. Specifically,large rectangular clearances were cut in multiple ground planes to make a very wide 50-ohm stripline. Also,typical 50-ohm stripline was designed with a ground-signal-ground structure. The stack-up had 16 metal layers,including 3 0S2P joining cores,2 2S2P signals cores,plated copper on top and bottom and embedded resistance on layer 7. A variety of material sets including liquid crystal polymer (LCP),polytetrafluoroethylene (PTFE),allylated polyphenylene ether (APPE) were used for the dielectric layers associated with the signal layers. Several conducting adhesives formulated using silver and Low melting point (LMP) fillers were used to fill small diameter holes for Z-interconnect applications. Laminated conducting joints show low resistance in the range of 10-12 milliohm per square inch. Electrically,S-parameter measurements showed very low loss at multi-gigahertz frequencies. The losses were equivalent to typical transmission lines in ceramic. This effort is an integrated approach on three fronts: materials development and characterization,fabrication,and design and electrical characterization at package level.