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Tetragonal ZrO_2-Gated Ge MOS Capacitors Fabricated on Si Substrate

机译:Si衬底上制备的四方ZrO_2门控Ge MOS电容器

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摘要

A tetragonal ZrO_2 film stabilized by incorporating Ge atoms from an underlying Ge layer through a thermal annealing was investigated as the gate dielectric for Ge MOS devices. Formation of a tetragonal ZrO_2 film and admixture of Ge atoms into a ZrO_2 film were respectively confirmed by x-ray diffraction (XRD) and x-ray photoelectron spectroscopy (XPS) analysis. A sole tetragonal ZrO_2 film was found to have a dielectric constant of 36.8 and demonstrated effective oxide thickness (EOT) down to 1.06 nm with good leakage current. However, it comes at the price of suffering poor interfacial quality. A more ideal gate stack for Ge MOS devices can be obtained by integrating a tetragonal ZrO_2 film with an ultrathin thermal GeO_2 layer to achieve a smaller EOT with satisfactory interfacial quality concurrently. Further improved gate stack performance can be accomplished by NH_3 or H_2 annealing to passivate grain boundaries.
机译:研究了通过热退火结合来自下面的Ge层中的Ge原子而稳定的四方ZrO_2膜,作为Ge MOS器件的栅介质。通过X射线衍射(XRD)和X射线光电子能谱(XPS)分析分别确认了四方ZrO_2膜的形成和Ge原子到ZrO_2膜中的掺混。发现唯一的四方ZrO_2膜具有36.8的介电常数,并显示了低至1.06 nm的有效氧化物厚度(EOT)和良好的漏电流。但是,这是以遭受不良界面质量为代价的。通过将四角形ZrO_2膜与超薄热GeO_2层集成在一起,以实现较小的EOT,同时满足令人满意的界面质量,可以获得用于Ge MOS器件的更理想的栅极叠层。可以通过NH_3或H_2退火钝化晶界来进一步提高栅极叠层性能。

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  • 会议地点 Vancouver(CA)
  • 作者单位

    Department of Engineering and System Science, National Tsing-Hua University, 300 Hsinchu, Taiwan;

    Department of Engineering and System Science, National Tsing-Hua University, 300 Hsinchu, Taiwan;

    Department of Engineering and System Science, National Tsing-Hua University, 300 Hsinchu, Taiwan;

    Department of Engineering and System Science, National Tsing-Hua University, 300 Hsinchu, Taiwan;

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  • 正文语种 eng
  • 中图分类 材料;
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