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Model to Hardware Matching For nano-meter Scale Technologies

机译:纳米匹配技术的模型到硬件匹配

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摘要

With technology scaling becoming ever more difficult, the drive to continue to deliver performance and density has led to increasing technology complexity. Examples include the pervasive application of resolution enhancement techniques (RET) to enable sub-wavelength lithography and achieve circuit density, and strain engineering to improve device mobility and achieve circuit performance. The result of this increasing technology complexity has been a corresponding increase in the complexity of design/technology interaction. This phenomena demonstrates itself as a drastic increase in the number and complexity of design rules. Many of these rules are the result of the increase of the number and magnitude of systematic effects. In addition to these systematic sources of variability, we have an increasing host of random variations such as line edge roughness, which impacts channel lengths, and random dopant fluctuations, which impact threshold voltage. The net result has been a reduction in our ability to reliably predict the outcome of the manufacturing process. Given that the integrated circuit design process is based completely on our ability to create computer models of the expected behavior of a design, this gap in predictability is a source of grave concern. Model to Hardware matching attempts to close this gap by developing techniques, tools, and design components which can be used to improve technology predictability.
机译:随着技术扩展变得越来越困难,不断提供性能和密度的驱动力导致技术复杂性的增加。示例包括分辨率增强技术(RET)的广泛应用,以实现亚波长光刻并获得电路密度,以及应变工程以提高器件迁移率并实现电路性能。这种技术复杂性增加的结果是设计/技术交互的复杂性相应增加。这种现象表现为设计规则的数量和复杂性急剧增加。这些规则中的许多规则是系统效果数量和数量增加的结果。除了这些系统性的可变性来源之外,我们还有越来越多的随机变化,例如影响通道长度的线边缘粗糙度和影响阈值电压的随机掺杂物波动。最终结果是我们可靠地预测制造过程结果的能力下降。鉴于集成电路设计过程完全基于我们创建设计的预期行为的计算机模型的能力,因此可预测性方面的这一差距引起了人们的严重关注。模型到硬件的匹配尝试通过开发可用于提高技术可预测性的技术,工具和设计组件来弥合这一差距。

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