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A 1.28GSPS 12-bits Optoelectronic Analog-to-Digital Converter

机译:一个1.28GSPS 12位光电模数转换器

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A 1.28GSPS 12-bits optoelectronic analog-to-digital converter is presented. The ADC architecture consists of an optical circuit that optically samples an analog input signal, and optoelectronic circuits that demultiplex different phases of the sampled signal (polyphase) to yield low data rate for electronic quantization. Electrical-in to electrical-out data format is maintained through the sampling, demultiplexing and quantization stages of the architecture thereby avoiding the need for electrical-to-optical and optical-to-electrical signal conversions. The ADC architecture encodes and multiplexes four 320MSPS 12-bits time interleaves quantized data into an aggregated 1.28GSPS 12-bits digital signal in real time. All clock signals at frequencies of 1.28GHz, 640MHz, and 320MHz are generated from a single 320MHz femtosecond laser source, thus eliminating the need for external synchronization and control signals. A Spurious Free Dynamic Range (SFDR) of value 80.6dB, and Effective number of bits (ENOB) of value 8.8 bits, were measured for the system.
机译:提出了一个1.28GSPS 12位光电模数转换器。 ADC体系结构由对模拟输入信号进行光学采样的光电路和对采样信号的不同相位(多相)进行多路分解以产生低数据速率以进行电子量化的光电电路组成。通过架构的采样,解复用和量化阶段可以保持电气输入到电气输出的数据格式,从而避免了电光信号转换和光电信号转换的需要。 ADC体系结构对四个320MSPS 12位时间交织的量化数据进行编码和多路复用,将其实时转换为聚合的1.28GSPS 12位数字信号。所有频率为1.28GHz,640MHz和320MHz的时钟信号都是由单个320MHz飞秒激光源产生的,因此无需外部同步和控制信号。对系统测量了80.6dB的无杂散动态范围(SFDR)和8.8位的有效位数(ENOB)。

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