Digital hardware circuit using FPGA for speed control system of permanent magnet synchronous motor

摘要

This paper proposes a novel digital hardware control motor drive system using a FPGA (Field Programmable Gate Array) device. We implement not only a current minor loop but also a speed control loop in the hardware device. We achieve 5μs period for speed control system of AC motor drive including dq transformation, decoupling control and dead-time compensator, and as a result current ripple and the motor torque ripple is decreased using the dead-time compensator. Experimental results show the validity of the proposed system.