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Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography

机译:切片加密的轻量级指令集扩展

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Bit-slicing is a non-conventional implementation technique for cryptographic software where an n-bit processor is considered as a collection of n 1-bit execution units operating in SIMD mode. Particularly when implementing symmetric ciphers, the bit-slicing approach has several advantages over more conventional alternatives: it often allows one to reduce memory footprint by eliminating large look-up tables, and it permits more predictable performance characteristics that can foil time based side-channel attacks. Both features are attractive for mobile and embedded processors, but the performance overhead that results from bit-sliced implementation often represents a significant disadvantage. In this paper we describe a set of light-weight Instruction Set Extensions (ISEs) that can improve said performance while retaining all advantages of bit-sliced implementation. Contrary to other crypto-ISE, our design is generic and allows for a high degree of algorithm agility: we demonstrate applicability to several well-known cryptographic primitives including four block ciphers (DES, Serpent, AES, and PRESENT), a hash function (SHA-1), as well as multiplication of ternary polynomials.
机译:位切片是一种用于密码软件的非常规实现技术,其中n位处理器被视为以SIMD模式运行的n个1位执行单元的集合。尤其是在实施对称密码时,位分片方法相对于更传统的替代方法具有多个优点:它通常允许一个方法通过消除大型查找表来减少内存占用,并且允许更可预测的性能特征,从而可以破坏基于时间的边信道攻击。这两种功能对于移动和嵌入式处理器都具有吸引力,但是位分割实现带来的性能开销通常代表着很大的缺点。在本文中,我们描述了一组轻量级指令集扩展(ISE),它们可以改善上述性能,同时保留位切片实现的所有优点。与其他加密ISE相反,我们的设计是通用的,并允许高度的算法敏捷性:我们展示了对几种著名的加密原语的适用性,包括四个块密码(DES,Serpent,AES和PRESENT),哈希函数( SHA-1),以及三项多项式的乘法。

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