Matching High and Low Side MOSFETs to Minimize Losses in Synchronous Buck DC-DC Converters

摘要

This paper focuses on the selection criteria for matching the high side (control) and low side (synchronous) power MOSFETs in low voltage synchronous buck converters. It discusses the high side and low side interaction and determine the key attributes leading towards a high-efficiency converter design. Analysis of MOSFET switching transitions is provided along with practical examples for determining excessive switching losses for both high and low side MOSFETs. Moreover, the switching waveforms will be analyzed with the aid of TCAD simulations. This will provide valuable insight into how the MOSFET packaging inductance influences lab measurements such as the low side MOSFET gate-source bounce and drain-to-source voltage stress.