Monolithic Integration of Photonic and Electronic Circuits in a CMOS Process

摘要

We present our approach to a low-cost, highly scalable opto-electronic integration platform based on a commercial CMOS process. In this talk, we detail the performance of the device library elements and highlight performance tradeoffs encountered in monolithically integrating optical and electronic circuits. We describe an opto-electronic integrated circuit (OEIC) design toolkit modeled after the standard electronic design flow, which includes automated design rule checking (DRC) and layout-versus-schematic (LVS) checks covering all types of circuit elements. As an example of integration, we detail the design of a multi-channel transceiver chip with 10 Gbps/channel optical data transmission speed and report on its performance.