ASIP are needed to handle the future demand of flexible yet high performance computation in mobile devices. However designing an ASIP is complicated by the fact that not only the processor, but also tools such as assemblers, simulators, and compilers have to be designed. No GAP is a design automation tool for ASIP design that imposes very few limitations on the designer. Yet No GAP supports the designer by automating much of the tedious and error prone tasks associated with ASIP design. This paper presented the methodology to fully generate a synthesizable HDL from NoGAPCL description in No GAP system. The advantage of No GAP is that it is a unify process without any architecture restriction. The case study shows No GAP can successfully generate ASIP's HDL description and the hardware generated by No GAP does not incur any performance loss than manually handled design.
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机译：需要ASIP来满足未来对移动设备中灵活而高性能计算的需求。但是，由于不仅必须设计处理器，而且还必须设计诸如汇编程序，模拟器和编译器之类的工具，因此设计ASIP变得很复杂。没有GAP是用于ASIP设计的设计自动化工具，它对设计人员几乎没有限制。但是，没有GAP通过自动化与ASIP设计相关的许多繁琐且容易出错的任务来支持设计人员。本文介绍了在No GAP系统中根据NoGAPCL描述完全生成可合成HDL的方法。 No GAP的优点在于它是一个不受任何体系结构限制的统一过程。案例研究表明No GAP不能成功生成ASIP的HDL描述，No GAP生成的硬件不会比手动处理的设计造成任何性能损失。
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