A Unified Representation of Temporal and Logical Behaviors of Circuits

摘要

This paper presents a new method for representing Timed Boolean Functions(TBFs) [2]. TBFs are represented by weighted directed acyclic graphs, called Timed BDDs (TBDDs), in a manner similar to OB-DDs. TBDDs, as an extension to the ordinary OB-DDs with timing information, provide a unified representation of temporal and logical behaviors of circuits. Although a timed Boolean function (TBF) requires, in the worst case, a TBDD of size exponential in the number of arguments, many TBDDs representing TBFs of circuits encountered in typical applications are of reasonable sizes.