Key Laboratory of Polar Materials and Devices Ministry of Education East China Normal University Shanghai 200241 People's Republic of China School of Electronics and Information Engineering Suzhou Vocational University Suzhou 215104 People's Republic of China;
Key Laboratory of Polar Materials and Devices Ministry of Education East China Normal University Shanghai 200241 People's Republic of China;
model; drain current; surface-potential-based; turn-on; DC; fully-depleted; poly-Si; thin film transistors;
机译:基于频道电位的表面电位模型和基于基于DC通道 - 基于DC通道 - 基于直流通道的漏极电流模型,用于全耗尽的多Si薄膜晶体管,包括散装中的尾部和深度受体的陷阱状态
机译:动态耗尽多晶硅薄膜晶体管的基于表面电势的漏极电流紧凑模型
机译:非退化导电状态下的a-InGaZnO薄膜晶体管基于表面电势的漏极电流紧凑模型
机译:全耗尽多Si薄膜晶体管的基于开启的基于DC表面电位的漏极电流模型
机译:用于神经形态应用的肖特基源极/漏极氢化非晶硅薄膜晶体管。
机译:凸源/漏极(RSD)和垂直掺杂漏极(LDD)多Si薄膜晶体管
机译:凸源/漏极(RSD)和垂直掺杂漏极(LDD)多Si薄膜晶体管