Impact of Time Delay and Error Amplifier Parameters to High-Bandwidth Voltage Regulator Module (VRM) Controller Design

摘要

High-bandwidth voltage regulator module (VRM) reduces output capacitance and output inductance, and therefore reduces cost. As the bandwidth of VRM is pushed higher and higher, the control-loop delay, error amplifier's DC gain and unity gain frequency show more and more significant impact for the controller design. In this paper, small signal models are used for analyzing loop delay and error amplifier so as to identify their impacts to controller design. Small signal analysis shows that for high bandwidth design, loop delay, error amplifier's DC gain and unity gain frequency reduce the phase margin of original design and should be compensated to achieve desired control bandwidth.