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A new architecture for neural signal amplification in implantable brain machine interfaces

机译:植入式脑机接口中神经信号放大的新架构

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This paper reports a new architecture for variable gain-bandwidth amplification of neural signals to be used in implantable multi-channel recording systems. The two most critical requirements in such a front-end circuit are low power consumption and chip area, especially as number of channels increases. The presented architecture employs a single super-performing amplifier, with tunable gain and bandwidth, combined with several low-key preamplifiers and multiplexors for multi-channel recordings. This is in contrast to using copies of high performing amplifier for each channel as is typically reported in earlier literature. The resulting circuits consume lower power and require smaller area as compared to existing designs. Designed in 0.5µmCMOS, the 8-channel prototype can simultaneously record Local Field Potentials and neural spikes, with an effective power consumption of 3.5 µW per channel and net core area of 0.407mm
机译:本文报道了一种用于可植入多通道记录系统中的神经信号可变增益带宽放大的新架构。在这种前端电路中,两个最关键的要求是低功耗和芯片面积,尤其是随着通道数量的增加。所展示的架构采用了具有可调增益和带宽的单个超高性能放大器,并结合了多个低调前置放大器和多路复用器以进行多通道录音。这与先前文献中通常报道的针对每个通道使用高性能放大器的副本形成对比。与现有设计相比,所得到的电路功耗更低,所需面积更小。采用0.5µmCMOS设计的8通道原型可以同时记录局部场电势和神经尖峰信号,每通道有效功耗3.5 µW,净核心面积为0.407mm

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