ASIC/system hardware verification at nortel: a view from the trenches

摘要

The emergence of functional verification as the largestsingle component of the ASIC development cycle has come as a bit of a surprise to the design community. At Nortel, we have had a goup focusing on the methodologies used at this stage of the design for four years. Our involvement with some of the largest Nortel hardware designs has provided us with first-hand experience of the challenges in establishing confidence that ASICs will work the first time ut in a system. This talk will describe the scope of the problems faced in ASIC-intensive telecomm systms the methodologies currently deployed, and the emerging technologies that we are looking towards in the future to improve our ability to handle complex hardware systems.