The research and development of an advanced verification infrastructure for ASIC devices using system verilog and the verification methodology manual (VMM)

摘要

The research described in this thesis has been conducted over a 24-month period as part of a college/industry partnership project. This project was funded under the Innovation partnership research grants scheme administered by Enterprise Ireland. The aim of the project is to research and develop an Advanced Verification Infrastructure using System Verilog and the Verification Methodology Manual ( VMM).