首页> 外文会议>42nd international symposium on microelectronics (IMAPS 2009) >Reliability Study of the Bump on Flexible Lead for Wafer Level Packaging
【24h】

Reliability Study of the Bump on Flexible Lead for Wafer Level Packaging

机译:晶圆级包装用柔性引线凸点的可靠性研究

获取原文
获取原文并翻译 | 示例

摘要

The Bump on Flexible Lead (BoFL) is a chip-to-substrate interconnect technology which uses flexible structures tornaccommodate the CTE mismatch between the chip and PCB substrate and therefore eliminates the need for underfill.rnThe concept of the BoFL is based on wafer level packaging processing methods, such as photolithography, electroplatingrnand wet-etching. The flexible lead consists of a copper redistribution layer embedded in a polyimidernbridge which is located over an air gap. For the BoFL only 3 additional processing steps are necessary, comparedrnto the conventional redistribution technology for wafer level chip size package (WL-CSP). Prototype chips (10 mm xrn5 mm) with different lead shapes were fabricated and assembled on low cost FR-4 boards. The assembled chipsrnwere subjected to thermal cycling (-55℃/+125℃). A big influence of the shape and the orientation of the BoFL onrnthe board-level reliability can be seen. The best results were obtained with the banana-shaped BoFL.
机译:柔性引线凸块(BoFL)是一种芯片到衬底的互连技术,它使用柔性结构来解决芯片和PCB衬底之间的CTE不匹配问题,从而消除了对底部填充的需求.rn BoFL的概念基于晶圆级封装加工方法,例如光刻,电镀和湿蚀刻。柔性导线由嵌入在气隙上方的聚酰亚胺桥中的铜再分布层组成。与传统的晶圆级芯片尺寸封装再分配技术(WL-CSP)相比,对于BoFL,仅需要3个额外的处理步骤。具有不同引线形状的原型芯片(10毫米x 5毫米)被制造并组装在低成本FR-4板上。将组装好的芯片进行热循环(-55℃/ + 125℃)。可以看到BoFL的形状和方向对板级可靠性的影响很大。香蕉形BoFL可获得最佳结果。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号